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 19-2049; Rev 2; 9/02
Dual, Audio, Log Taper Digital Potentiometers
General Description
The MAX5408-MAX5411 dual, logarithmic taper digital potentiometers, with 32-tap points each, replace mechanical potentiometers in audio applications requiring digitally controlled resistors. The MAX5408/ MAX5410 are dual potentiometers with one wiper per potentiometer. The MAX5409/MAX5411 are dual potentiometers with two wipers per potentiometer (see Functional Diagram). An SPITM-compatible serial interface controls the wiper positions. The MAX5408- MAX5411 have a factory-set resistance of 10k per potentiometer. A zero-crossing detect feature minimizes the audible noise generated by wiper transitions. The MAX5408-MAX5411 have nominal temperature coefficients of 35ppm/C end-to-end and 5ppm/C ratiometric. The MAX5408-MAX5411 are available in 16-pin QSOP and 16-pin thin QFN packages and are specified over the extended temperature range (-40C to +85C). o 32-Tap Positions for Each Wiper o Small 16-Pin QSOP/QFN Packages o Single-Supply Voltage Operation +2.7V to +3.6V (MAX5408/MAX5409) +4.5V to +5.5V (MAX5410/MAX5411) o Low 0.5A Standby Supply Current o Zero-Crossing Detection for Clickless Switching o Mute Function to -90dB o 10k Fixed Resistance Value o 3-Wire SPI-Compatible Serial Data Interface o Power-On Reset: Wiper Goes to Maximum Attenuation o Digital Output for Readback and Daisy-Chaining Capabilities
Features
o Log Taper with 2dB Steps Between Taps
MAX5408-MAX5411
Applications
Stereo Volume Control Fading and Balancing Stereo Signals Mechanical Potentiometer Replacement
Ordering Information
PART TEMP RANGE PINPACKAGE WIPERS PER RESISTOR 1 1 2
MAX5408EEE -40C to +85C 16 QSOP MAX5408ETE -40C to +85C 16 Thin QFN
Functional Diagram appears at end of data sheet. SPI is a trademark of Motorola, Inc.
MAX5409EEE -40C to +85C 16 QSOP
Ordering Information continued at end of data sheet.
Pin Configurations
TOP VIEW
DIN 16
DOUT 1 DIN 2 SCLK 3 CS 4 H0 5 L0 6 W0A 7 N.C. (W0B) 8 16 VDD 15 VLOGIC 14 GND DOUT VDD VLOGIC
15
14
13
SCLK
1
12
GND
MAX5408MAX5411
13 AGND 12 H1 11 L1 10 W1A 9 N.C. (W1B)
CS
2
11
AGND
MAX5408MAX5411
H0 3 10 H1
L0
4 5
9
L1
QSOP (5mm x 6mm)
( ) ARE FOR MAX5409/MAX5411 ONLY
6
7
8
W1A
W0A N.C. (W0B) N.C. (W1B)
THIN QFN (4mm x 4mm)
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
ABSOLUTE MAXIMUM RATINGS
VDD, VLOGIC, CS, SCLK, DIN to GND ......................-0.3V to +6V H_, L_, and W_ to GND ..............................-0.3V to (VDD + 0.3V) DOUT to GND.............................................-0.3V to (VDD + 0.3V) AGND to GND .......................................................-0.3V to +0.3V Input and Output Latchup Immunity...............................200mA Maximum Continuous Current into H_, L_, and W_.........500A Continuous Power Dissipation (TA = +70C) 16-Pin QSOP (derate 8.3mW/C above +70C)........666.7mW 16-Pin QFN (derate 18.5mW/C above +70C) .........1481mW Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-60C to +150C Maximum Junction Temperature .....................................+150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX5408/MAX5409), VDD = +4.5V to +5.5V (MAX5410/MAX5411), VH_ = VDD, VL_ = 0, TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise specified.)
PARAMETER End-to-End Resistance Maximum Bandwidth Absolute Tolerance Tap-to-Tap Tolerance Total Harmonic Distortion + Noise Channel Isolation Interchannel Matching Mute Attenuation Power-Supply Rejection Ratio Wiper Resistance Wiper Capacitance Digital Clock Feedthrough End-to-End Resistance Temperature Coefficient Ratiometric Resistance Temperature Coefficient DIGITAL INPUTS (VLOGIC > 4.5V) Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance DIGITAL INPUTS (VLOGIC < 4.5V) Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance 5 VIH VIL 0.7 x VLOGIC 0. 3 x VLOGIC 1 V V A pF 5 VIH VIL 2.4 0.8 1 V V A pF PSRR RW CW fSCLK = 20Hz to 20kHz, tap = -6dB f = 20Hz to 20kHz, tap = -6dB THD+N VIN = 1VRMS, f = 1kHz, tap = -6dB (Note 1) CW_ = 50pF SYMBOL CONDITIONS MIN 7 100 0.25 0.1 0.002 -100 0.5 -90 -80 1000 10 -90 35 5 1700 TYP 10 MAX 13 UNITS k kHz dB dB % dB dB dB dB pF dB ppm/C ppm/C
2
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Dual, Audio, Log Taper Digital Potentiometers
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX5408/MAX5409), VDD = +4.5V to +5.5V (MAX5410/MAX5411), VH_ = VDD, VL_ = 0, TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise specified.)
PARAMETER DIGITAL OUTPUT Output High Voltage Output Low Voltage SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time DIN Setup Time DIN Hold Time SCLK Fall to DOUT Valid Propagation Delay CS Rise to SCLK Rise Hold Time CS Pulse Width High Wiper Settling Time POWER SUPPLIES Supply Voltage Active Supply Current Standby Supply Current Logic Supply Voltage Logic Active Supply Current Logic Standby Supply Current VDD IDD VLOGIC ILOGIC fSCLK = 2MHz, DOUT = floating (Note 2) DOUT = floating (Note 3) 0.5 MAX5408/MAX5409 MAX5410/MAX5411 fSCLK = 2MHz (Note 2) (Note 3) 2.7 0.2 2.7 4.5 3.6 5.5 100 10 5.5 120 10 V A V A VOH VOL tCP tCH tCL tCSS tCSH tDS tDH tDO tCS1 tCSW tIW Zero-crossing detect disabled CLOAD = 200pF 40 100 1 ISOURCE = 0.5mA ISINK = 2mA 100 40 40 40 0 40 0 80 VLOGIC - 0.5 0.4 V V ns ns ns ns ns ns ns ns ns ns s SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5408-MAX5411
TIMING CHARACTERISTICS (Figure 1)
Note 1: Guaranteed by design, not production tested. Note 2: Supply current measured while changing wiper position with zero crossing enabled. Note 3: Supply current measured while wiper position is fixed.
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3
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
Typical Operating Characteristics
(VDD = +3V (MAX5408/MAX5409), VDD = +5V (MAX5410/MAX5411), DOUT = floating)
WIPER RESISTANCE vs. WIPER VOLTAGE
MAX5408-11 toc01
END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE
END-TO-END RESISTANCE CHANGE (%) 0.15 0.10 0.05 0 -0.05 -0.10 -0.15 -0.20 -40 -15 10 35 60 85
MAX5408-11 toc02
996 995 WIPER RESISTANCE () 994 993 992 991 990 989 VDD = 5V = VLOGIC, L_ = GND 988 0 TAP POSITION 31
0.20
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 WIPER VOLTAGE (V)
TEMPERATURE (C)
ATTENUATION vs. TAP POSITION
MAX5408-11 toc03
TOTAL SUPPLY CURRENT VS. TEMPERATURE
55 TOTAL SUPPLY CURRENT (A) 50 45 40 35 30 25 20 ZERO-CROSSING ENABLED ITOTAL = IDD + ILOGIC ACTIVE MODE
MAX5408-11 toc04
0 -10 ATTENUATION (dB) -20 -30 -40 -50 -60 -70 0 4 8 12 16 20 24 28
60
32
-40
-15
10
35
60
85
TAP POSITION
TEMPERATURE (C)
TAP-TO-TAP SWITCHING TRANSIENT (ZERO-CROSSING DISABLE)
MAX5408-11 toc05
LOGIC CURRENT vs. LOGIC VOLTAGE
STANDBY MODE SCLK = GND
MAX5408-11 toc06
0.30 LOGIC SUPPLY CURRENT (A) 0.25 0.20 0.15 0.10 0.05 0
VW_ 2V/div
CS 2V/div VH_ = 5V VL_ = 0
4s/div
2.5
3.0
3.5
4.0
4.5
5.0
5.5
LOGIC SUPPLY VOLTAGE (V)
4
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Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
Typical Operating Characteristics (continued)
(VDD = +3V (MAX5408/MAX5409), VDD = +5V (MAX5410/MAX5411), DOUT = floating)
LOGIC CURRENT vs. LOGIC VOLTAGE
MAX5408-11 toc07
SUPPLY CURRENT vs. SUPPLY VOLTAGE
0.50 0.45 0.40 0.35 IDD (A) 0.30 0.25 0.20 0.15 0.10 0.05 0 STANDBY ACTIVE ZERO-CROSSING DETECTION DISABLED
MAX5408-11 toc08
50 45 LOGIC SUPPLY CURRENT (A) 40 35 30 25 20 15 10 5 0 2.5 3.0 3.5 4.0 4.5 5.0 ACTIVE MODE SCLK = 2MHz, O to VLOGIC
0.55
5.5
2.5
3.0
3.5
4.0 VDD (V)
4.5
5.0
5.5
LOGIC SUPPLY VOLTAGE (V)
Pin Description
PIN MAX5408/ MAX5408/ MAX5410 (QFN) MAX5410 (QSOP) 1 2 3 4 5 -- -- 8 9 10 11 12 13 14 15 16 6, 7 3 4 5 6 7 -- -- 10 11 12 13 14 15 16 1 2 8, 9 MAX5409/ MAX5409/ MAX5411 (QFN) MAX5411 (QSOP) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 -- 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 -- NAME SCLK CS H0 L0 W0A W0B W1B W1A L1 H1 AGND GND VLOGIC VDD DOUT DIN N.C. FUNCTION Serial Clock Input Chip-Select Input High Terminal of Resistor 0 Low Terminal of Resistor 0 Wiper Terminal A of Resistor 0 Wiper Terminal B of Resistor 0 Wiper Terminal B of Resistor 1 Wiper Terminal A of Resistor 1 Low Terminal of Resistor 1 High Terminal of Resistor 1 Analog Ground Ground Digital Logic Power Supply Analog Power Supply Serial Data Output Serial Data Input No Connection. Not internally connected.
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5
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
Table 1. Serial Interface Programming Commands for MAX5408/MAX5410
8-BIT SERIAL WORD A0 0 0 0 0 1 1 1 1 1 1 1 1 A1 0 0 1 1 0 0 1 1 1 1 1 1 A2 0 1 0 1 0 1 0 0 0 0 0 0 5-bit DAC data 5-bit DAC data 5-bit DAC data 5-bit DAC data 4-bit mute data, D0 = "don't care" 4-bit zero-crossing detection data, D0 = "don't care" 00000 00001 00010 00011 00100 00101 D4-D0 No change Set position of wiper W1A No change Data for mute register (see Table 3) Data for zero-crossing detection register (see Table 5) Readback contents of wiper register for W0A at DOUT No change Readback contents of wiper register for W1A at DOUT No change Readback contents of mute register at DOUT Readback contents of zero-crossing detection register at DOUT Immediate update then analog power-down when zero crossing is enabled. No effect when zero crossing is disabled. FUNCTION Set position of wiper W0A
1
1
1
D4 = 0, D3-D0 = "don't care
Detailed Description
Digital Serial Interface
An SPI-compatible serial interface controls the MAX5408-MAX5411. The input word to the device is eight bits long, composed of three address bits (A0, A1, and A2), followed by five data bits, with MSB first (see Tables 1 and 2). The first three address bits set the value of internal registers. The five data bits control the wiper position. For certain commands, some of the five data bits are "don't cares", but must be sent to the device. The serial data is listed in Tables 1 and 2. The control code determines: * Potentiometer to update or register to set. * Data for mute register (Tables 3 and 4). * Data for zero-crossing detection register (Tables 5 and 6). The data bits control the position of the wiper (Table 7). A logic low on the chip-select input (CS) enables the device's serial interface. A logic high on CS disables the interface control circuitry. See Figure 1 for serialinterface timing description.
6
CS tCSS SCLK tDS DIN tCH
tCL
tDH
DOUT
CS tCP SCLK tCSH tCSI
tCSW
DIN tDO DOUT tIW WIPER
Figure 1. Serial Timing Diagram
_______________________________________________________________________________________
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
Table 2. Serial Interface Programming Commands for MAX5409/MAX5411
8-BIT SERIAL WORD A0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 A1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 A2 0 1 0 1 0 1 0 0 0 0 0 0 1 1 D4-D0 5-bit DAC data 5-bit DAC data 5-bit DAC data 5-bit DAC data 4-bit mute data, D0 = "don't care" 4-bit zero-crossing detection data, D0 = "don't care" 00000 00001 00010 00011 00100 00101 D4 = 0, D3-D0 = "don't care" D4 = 1, D3-D0 = "don't care" Set position of wiper W0A Set position of wiper W0B Set position of wiper W1A Set position of wiper W1B Data for mute register (see Table 4) Data for zero-crossing detection register (see Table 6) Readback contents of wiper register for W0A at DOUT Readback contents of wiper register for W0B at DOUT Readback contents of wiper register for W1A at DOUT Readback contents of wiper register for W1B at DOUT Readback contents of mute register at DOUT Readback contents of zero-crossing detection register at DOUT Analog power-down Analog power-up FUNCTION
Table 3. Mute Register Bit Definitions for MAX5408/MAX5410
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 "don't care" 0 1 "don't care" "don't care" Set wiper W0A to mute (-90dB) No change Set wiper W1A to preprogrammed value (-62dB on power-up) Set wiper W1A to mute (-90dB) No change No change FUNCTION Set wiper W0A to preprogrammed value (-62dB on power-up)
Table 4. Mute Register Bit Definitions for MAX5409/MAX5411
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 0 1 0 1 0 1 "don't care" Set wiper W0A to mute (-90dB) Set wiper W0B to preprogrammed value (-62dB on power-up) Set wiper W0B to mute (-90dB) Set wiper W1A to preprogrammed value (-62dB on power-up) Set wiper W1A to mute (-90dB) Set wiper W1B to preprogrammed value (-62dB on power-up) Set wiper W1B to mute (-90dB) No change FUNCTION Set wiper W0A to preprogrammed value (-62dB on power-up)
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7
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
Table 5. Zero-Crossing Detection Register Bit Definitions for MAX5408/MAX5410
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 "don't care" 0 1 "don't care" "don't care" FUNCTION Disable wiper W0A zero-crossing detection circuit Enable wiper W0A zero-crossing detection circuit No change Disable wiper W1A zero-crossing detection circuit Enable wiper W1A zero-crossing detection circuit No change No change
Table 6. Zero-Crossing Detection Register Bit Definitions for MAX5409/MAX5411
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 0 1 0 1 0 1 "don't care" FUNCTION Disable wiper W0A zero-crossing detection circuit Enable wiper W0A zero-crossing detection circuit Disable wiper W0B zero-crossing detection circuit Enable wiper W0B zero-crossing detection circuit Disable wiper W1A zero-crossing detection circuit Enable wiper W1A zero-crossing detection circuit Disable wiper W1B zero-crossing detection circuit Enable wiper W1B zero-crossing detection circuit No change
Table 7. Attenuation and Wiper Position
POSITION 0 1 2 3 4 . . . . . 30 31 MUTE OUTPUT LEVEL (dB) 0 -2 -4 -6 -8 . . . . . -60 -62 <-90
A readback request overwrites any previous data in the shift register. Note that the data appears at DOUT in the order: A0, A1, A2, D4, D3, D2, D1, D0. A0 will be available after the first high-to-low transition of SCLK when CS is low. The input continues to load the shift register while data is being read out of the MAX5408- MAX5411. The input data appears at DOUT 8.5 clock cycles later. A CS transition from low-to-high latches the input data. For any control byte, the state of SCLK must be the same for both CS low-to-high transitions and CS high-to-low transitions in order to preserve the data at DOUT while CS transitions.
Zero-Crossing Detection
The zero-crossing detection register enables the zerocrossing detect feature. The zero-crossing detect feature reduces the audible noise ("clicks and pops") that result from wiper transitions. The wiper changes position only when the voltage at L_ is the same as the voltage at H_. Each wiper has a zero-crossing and timeout circuit (see Figure 2). With zero-crossing enabled, the MAX5408-MAX5411 change wiper position after 50ms or when zero crossing is detected.
The digital output, DOUT, lags the digital input signal, DIN by 8.5 clock cycles. Force CS high to disable DOUT, placing DOUT in three-state mode. Force CS low to enable DOUT and disable three-state mode. Force CS high, after a word has been written to the MAX5408-MAX5411 to make a readback request. The next CS low period writes the requested data to DOUT.
8
_______________________________________________________________________________________
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
V H_
V H_
V L_ -10dB WIPER POSITION -20dB
V L_ -10dB WIPER POSITION -20dB
t=0
50ms (TYP)
100ms
t=0
50ms (TYP)
100ms
CHANGING WIPER POSITIONS WITH ZERO-CROSSING ENABLED, COMMAND ISSUED AT t = 0
Figure 2. Zero-Crossing Timing Diagram
VIN0 H0 VIN1 H1
VOUT0
W0A
MAX5408- MAX5411
W1A
VOUT1
L0
L1
Figure 3. Attenuation Control
VLEFT
VRIGHT
VLEFTF
W0A
H0
H1
W1A
VRIGHTF
MAX5409/ MAX5411
VLEFTR
W0B L0 L1
W1B
VRIGHTR
Figure 4. Stereo Volume Control with Front and Rear Fade _______________________________________________________________________________________ 9
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
SCLK
H0
SCLK SCLK SCLK
H1 VIN1
VIN0 VOUT0 W0A MAX5408- MAX5411 W1A
VOUT1
SDIN
SDIN
DOUT
SDIN
DOUT
SDIN
DOUT
CS
MAX5408- MAX5411
CS
MAX5408- MAX5411
CS
MAX5408- MAX541
L0
L1
CS
Figure 5. Daisy-Chaining of Serial Interfaces
Figure 6. Gain Control
Power-On Reset
The power-on reset (POR) feature sets all the wipers to the maximum attenuation (tap position 31, -62dB) at power-up. If either VDD or VLOGIC is zero volts, a poweron reset intiates when one of the supplies is brought back to the operating voltage.
Gain Control
Figure 6 shows the application of a gain control. Note: Muting the potentiometer creates unpredictable behavior at the output of the op amp, and may seriously degrade the performance of the op amp.
Mute Function
When mute is enabled, the wipers go to -90dB attenuation. When mute is disabled, the wiper returns to its position before mute was enabled. All wipers can be muted simultaneously or independently.
Ordering Information (continued)
PART MAX5409ETE MAX5410ETE MAX5411ETE TEMP RANGE PINPACKAGE WIPERS PER RESISTOR 2 1 1 2 2
-40C to +85C 16 Thin QFN -40C to +85C 16 Thin QFN -40C to +85C 16 Thin QFN
Applications Information
Attenuation Control
Figure 3 shows the application of an attenuation control. The op amps are connected in a follower configuration with a fixed gain. The digitally controlled potentiometer attenuates the input signal.
MAX5410EEE -40C to +85C 16 QSOP MAX5411EEE -40C to +85C 16 QSOP
Chip Information
TRANSISTOR COUNT: 12,875 PROCESS: BiCMOS
Stereo Volume Control
Figure 4 shows the application of stereo volume control using MAX5409/MAX5411. The op amps are connected in a follower configuration with fixed gain. The digitally controlled potentiometer attenuates the input signals. The second wiper of each potentiometer controls the signal amplitude at the rear set of speakers.
Daisy-Chaining
Figure 5 shows an application daisy-chaining the serial-interfaces of the MAX5408-MAX5411. A singlewrite command updates multiple devices from a single digital port in this configuration (see Digital Serial Interface section).
10
______________________________________________________________________________________
Dual, Audio, Log Taper Digital Potentiometers
Functional Diagram
MAX5408-MAX5411
W0A
H0
N.C. (W0B) DOUT
W1A
H1
N.C. (W1B)
MAX5408- MAX5411
32 POSITION DECODER/ REGISTER
AUDIO ZEROCROSSING DETECTOR
SPI LOGIC
VLOGIC VDD
L0
SCLK
DIN
CS
L1
GND AGND
( ) ARE FOR MAX5409/MAX5411 ONLY
______________________________________________________________________________________
11
Dual, Audio, Log Taper Digital Potentiometers MAX5408-MAX5411
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE 12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
PACKAGE OUTLINE 12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
12 _______________________________________________________________________________________
Dual, Audio, Log Taper Digital Potentiometers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QSOP.EPS
MAX5408-MAX5411
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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